Bio: Jacobus W. Swart holds a degree in Electrical Engineering from the University of São Paulo (1975), a PhD in Electrical Engineering from the University of São Paulo (1981), and post-doctorate degrees from the Catholic University of Leuven, Belgium (1983), and the Research Triangle Institute, USA (1991). He has been a full professor at the University of Campinas since May 1997. After retiring in June 2013, he holds the associate professor position at FEEC/UNICAMP. He has experience in Electrical Engineering, with an emphasis on Semiconductor Materials and Components, working mainly on the following topics: technologies and design of Si and GaAs integrated circuits, CMOS, HBT, thin films, plasma etching, and nanoelectronics. He was director of CCS/UNICAMP from 1998 to 2005 and CTI from 2007 to 2011. He was president of SBMicro for two terms. He was a member of the CNPq CA-EE for two terms and a member of the CNPq CD for 4 years. He is a "Distinguished Lecturer" and was secretary and elected member of the Board of Governors of the Electron Device Society of the IEEE. He is a Life Fellow of the IEEE and received the EDS/IEEE Distinguished Service Award 2020. He is an elected member of ACIESP and ANE. He is a PQ-1A fellow from CNPq. He was the coordinator of the CI-Brasil program of the MCTI from 2007 to 2013 and has coordinated the INCT NAMITEC research network since 2001, which was renewed by notice 58/2022. Between 2013 and 2020, he worked as a consultant and representative of Imec in Belgium.

Distinguished Lecture: 100 years of Field Effect Transistors: From MOSFET to CFET Devices Bio: Joao Antonio Martino (SM’07) was born in Sao Paulo, Brazil, in 1959, preserving both nationalities: Brazilian and Italian. He received a degree in electrical engineering from FEI University Center in 1981. He started in the microelectronics field in 1982 on the graduate program, when he received the Master's (NMOS technology) and Ph.D (CMOS technology) degrees in 1984 and 1988, respectively, in electrical engineering (microelectronics area) from the University of Sao Paulo (USP), Brazil. He worked as a post-doctoral researcher in collaboration between Imec (Interuniversity Microelectronic Center)/KU Leuven (Catholic University of Leuven), Belgium, and the University of Sao Paulo from 1989 to 1994 in SOI technology and devices. From 1996 to 2006, he was head of the Department of Electrical Engineering at FEI University Center and head of the graduate course from 2005 to 2006. In 1992, he joined the Department of Electronic Systems of the University of Sao Paulo, Brazil, where he has been a full Professor since 2005. He is also head of the CMOS SOI group since 1990 and head of the Laboratory of Integrated Systems since 2017, both from the University of São Paulo. He was also the head of the Department of Electronic Systems from 2009 to 2013 and head of the Electrical Engineering graduation course from 2019 to 2023 from the University of Sao Paulo. He is the author and co-author of more than 730 technical journal papers and conference proceedings and the author/editor of 7 books. He completed the supervision of 78 graduate students (43 masters and 23 PhDs as advisor and nine masters and 3 PhDs as co-advisor). He introduced the study of SOI device characterization and technology in Brazil in 1990. He was the head of the first 3D transistor (electron beam triple gate FinFET) fabricated in South America in 2012. He got the patent for the first reconfigurable SOI MOSFET fabricated in South America in 2015. His research interests include electrical characterization and fabrication of SOI, multiple gates (FinFET, nanowire, nanosheet, forksheet), Tunnel-FET, Reconfigurable FET, and Bio-FET devices. The application of new transistors in basic analog circuits is also studied. He is a Senior Member of IEEE and a member of the Electrochemical Society. He was Vice-Chair of Region 9 Subcommittee for Regions/Chapters of IEEE Electron Device Society (EDS/IEEE) from 2013 to 2018. He has been Chapter Chair of the South Brazil Session of EDS/IEEE since 2007 and a Distinguished Lecturer of EDS/IEEE since 2008. He is a PQ-1A researcher at CNPq. He received the Padre Roberto Landell de Moura Award in 2016 from the Brazilian Society of Microelectronics. He is currently the President of the Brazilian Microelectronic Society (2024-2026). Sponsored by: The IEEE/EDS FEI Student Branch

Bio:José Alexandre Diniz (Member, IEEE and AVS) received a B.Sc. degree in physics and the M.Sc. and Ph.D. degrees in electrical engineering, all from the University of Campinas (UNICAMP), Campinas, Brazil, in 1988, 1992, and 1996, respectively. He was a Postdoctoral Researcher at the Department of Semiconductors, Instruments, and Photonics (DSIF), UNICAMP, from 1996 to 1998. As a Visiting Scientist, he was with the University of Florida, Gainesville, FL, USA, in January 1998. Since January 1999, he has worked as a Researcher at the Center for Semiconductor Components and Nanotechnologies (CCSNano), UNICAMP. He has published over 240 technical articles in peer-reviewed Journals and International Conference proceedings. He has graduated 16 Ph.D. and 21 M.S. students. His main interests are ultra-thin high-k film growing, thin film deposition and etching techniques, fabrication of solid-state micromechanical structures, high-speed transistors (MOSFETs, FinFETs, HBTs and FETs based on Si, GaAs, and graphene), photovoltaic cells and sensors. Dr. Diniz is a member of EDS/IEEE and AVS. He was the Associate Director of CCSNano from June 2005 to June 2010, and from July 2010 to August 2016, he was the Director of this Center. Since September 2002, he has worked as a Professor of Electronics at the School of Electrical and Computer Engineering (FEEC), UNICAMP. In April 2017, he became a Full Professor in this area. From April 2019 to April 2023, he was the Director of FEEC/Unicamp. He was the Vice-President of the Brazilian Society of Microelectronics from 2016 to 2020.

Distinguished Lecture: Cryogenic Operation of Planar and Multigate Fully Depleted SOI MOSFETs Bio:Marcelo Antonio Pavanello (S´99-M´02-SM´05) is a Full Professor at the Electrical Engineering Department of Centro Universitario FEI. His current interests are the compact modeling, fabrication, electrical characterization, and simulation of SOI CMOS transistors with multiple gate configurations and silicon nanowires; the wide temperature range of operation of semiconductor devices; the digital and analog operation of novel channel-engineered SOI devices and circuits. He is the author or co-author of more than 400 technical papers in peer-reviewed journals and conferences and the author/editor of 6 books. Dr. Pavanello is a Researcher Associated with the National Council for Scientific Development (CNPq), Brazil, a Senior Member of the IEEE, and a member of the Brazilian Microelectronics Society. Since 2019, he is an Editor of IEEE Transactions on Electron Devices. Since 2021, he is an Editor of IEEE Access journal. Since 2007, he serves as IEEE Electron Devices Society (EDS) Distinguished Lecturer and has been nominated to the Compact Modeling Technical Committee (CMTC) of EDS between 2018 and 2021. In 2008, he has been with UCL as a visiting professor. Between 2010 and 2020, he also served as Vice-Rector for Teaching and Research at FEI. Dr. Pavanello coordinates several research projects fomented by Brazilian agencies like FAPESP, CNPq, and Capes. He also supervised several Ph.D. dissertations, MSc thesis, and undergraduate projects in Electrical Engineering. Dr. Pavanello received an Electrical Engineering degree from FEI University in 1993, receiving the award “Instituto de Engenharia” for being the best student among all the modalities of engineering programs offered at FEI. He received the M. Sc. and Ph. D. degrees in 1996 and 2000, respectively, in Electrical Engineering (Microelectronics) from the University of São Paulo, Brazil. From August to December 1998, he was with Laboratoire de Microélectronique from Université Catholique de Louvain (UCL), Belgium, working in the fabrication and electrical characterization of novel channel-engineered Silicon-On-Insulator (SOI) transistors. From 2000 to 2002, he was with the Center of Semiconductor Components and Nanotechnologies, State University of Campinas, Brazil, where he worked as a post-doctoral researcher in developing a CMOS n-well process. In 2003, he joined FEI University

Distinguished Lecture: Noise induced Jitter of Signals in Synchronous Circuits Bio: Gilson Wirth (M’97–SM’07) received the B.S.E.E and M.Sc. degrees from UFRGS – Univ. Federal do Rio Grande do Sul, Brazil, in 1990 and 1994, respectively. In 1999 he received the Dr.-Ing. degree in Electrical Engineering from the University of Dortmund (TU Dortmund), Dortmund, Germany. He is currently a full professor at the Electrical Eng. Depart. at Univ. Federal do Rio Grande do Sul - UFRGS (since January 2007). From July 2002 to December 2006 he was professor and head of the Computer Engineering Department, Univ. Estadual do Rio Grande do Sul - UERGS. His current research work focuses on modeling and electrical simulation of charge trapping in the context of Bias Temperature Instability (BTI), Low-Frequency Noise (1/f and RTN) and Hot Carrier Degradation (HCD). He has also worked on ionizing radiation effects (TID and SET/SEU) on semiconductor devices. He focuses on collaborative work with academia and industry. He has established successful collaborative work with different companies and research groups in Europe, North and South America, and Asia. He is currently a Distinguished Lecturer of the IEEE Electron Devices Society. He also was a distinguished lecturer of the IEEE Circuits and Systems Society (term 2010-2011). Sponsored by: The IEEE/EDS EPUSP Student Branch

Distinguished Lecture Bio:Adelmo Ortiz-Conde (S’82, M'85, SM'97) was born in Caracas, Venezuela, on November 28, 1956. He received the professional Electronics Engineer degree from Universidad Simón Bolívar (USB), Caracas, Venezuela, in 1979 and the M.E. and Ph.D. from the University of Florida, Gainesville, in 1982 and 1985, respectively. His doctoral research, under the guidance of Prof. J. G. Fossum, was on the Effects of Grain Boundaries in SOI MOSFET’s. From 1979 to 1980, he served as an instructor in the Electronics Department at USB. In 1985, he joined the technical Staff of Bell Laboratories, Reading, PA, where he was engaged in developing high-voltage integrated circuits. Since 1987 he returned to the Electronics Department at USB where he was promoted to Full Professor in 1995. He was on sabbatical leave at Florida International University (FIU), Miami, from September to December 1993, at the University of Central Florida (UCF), Orlando, from January to August 1994, and again from July to December 1998. He was also on sabbatical leave at “Centro de Investigaciones y Estudios Avanzados” (CINVESTAV) National Polytechnic Institute (IPN), Mexico City, Mexico, from October 2000 to February 2001. Dr. Ortiz-Conde is an EDS Distinguished Lecturer. Sponsored by: The FEI IEEE/EDS Chapter

Bio: Saulo Finco graduated in Electrical Engineering from FEJ/UDESC (1987). Master's degree (1996) and PhD (2000) in Electrical Engineering from UNICAMP. Worked at the Renato Archer Computer Technology Center - CTI as a researcher since 1988. Served as head of the Hardware Systems Design Division for over 15 years. He served as Coordinator of the DH CTI/CNPq Project within the scope of the CI Brasil Program from 2006 to 2010. He has coordinated projects with funding from FINEP, BNDES, CNPq, and other development contracts, using resources from the Information Technology Law, since 1993. He worked as a guest researcher at UNICAMP until 2015, carrying out activities at FEEC/DSIF in the Microelectronic Sensors Laboratory in research activities related to the development of sensors, including radiant sensors such as photodiodes for applications in the visible and infrared spectrum region. He is currently the coordinator of the CITAR/FINEP Project, aiming to develop a methodology for Radiation-Tolerant Integrated Circuit Designs for medical and space applications. He has also researched ​​Energy Generation and Conversion Systems optimized for the use of primary sources of clean and renewable energy. He has collaborated with developing hybrid thermodynamic systems, the concept of differential cycle heat engines, and the concept of binary cycle heat engines based on the hybrid thermodynamic system. He is the co-author of several patents in this area.

Bio:Marco Leite holds a bachelor's degree in Physics from the University of São Paulo (1989), a master's degree in Physics from the University of São Paulo (1993) and a PhD in Physics from the University of São Paulo (1999). Post-doctorate in Physics at Brookhaven National Laboratory (USA) (2000-2002). CNPq researcher level II (Technological Development) from 2010 to 2022 and Research Productivity level II from 2024-2027. He is currently a physicist (laboratory specialist) at the University of São Paulo and the ATLAS CERN-USP collaboration coordinator. He has experience in the area of ​​Physics, with emphasis on Experimental Methods and Instrumentation for Elementary Particles and Nuclear Physics, working mainly on the following topics: development of hardware and software systems for data acquisition and processing in High Energy and Nuclear Physics experiments, development of methods and techniques for radiation detection and data analysis in proton-proton and heavy ion collisions in the ATLAS (LHC at CERN) and PHENIX (RHIC at Brookhaven) experiments.

Bio:Alvin Loke is a Senior Principal Engineer at Intel, San Diego, working on analog design/technology co-optimization for Intel’s Angstrom-era CMOS. He has previously worked on CMOS nodes spanning 250nm to 2nm at Agilent, AMD, Qualcomm, TSMC, and NXP. He received a B.A.Sc. in engineering physics from the University of British Columbia, and M.S. and Ph.D. in electrical engineering from Stanford. After several years in CMOS process integration, Alvin has since worked on analog/mixed-signal design focusing on a variety of wireline links, design/model/technology interface, and analog design methodologies. Alvin has been an active IEEE Solid-State Circuits Society (SSCS) volunteer since 2003, having served as Distinguished Lecturer, AdCom Member, CICC Committee Member, Webinar Chair, Denver and San Diego Chapter Chair, as well as JSSC, SSCL, and Solid-State Circuits Magazine Guest Editor. He currently serves as the VLSI Symposium Secretary, SSCS Global Chapters Chair, and again as Distinguished Lecturer. Alvin has authored over 70 publications including the CICC 2018 Best Paper and invited short courses at ISSCC, VLSI Symposium, CICC, and BCICTS. He holds 29 US patents and recently received the ISSCC 2024 Outstanding Forum Speaker Award. Sponsored by: The USP IEEE/SSCS Chapter